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CortexM1 and Keil Stack
by jargule on Oct 14, 2011 |
jargule
Posts: 3 Joined: Oct 4, 2011 Last seen: Oct 21, 2011 |
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Anyone try it out with the latest Quartus II 11.0sp1 CortexM1 ARM core? Also using Keil RTOS with there TCPNet Stack. Trying to get transmitter to work. Cannot ping due to no ARP request getting through to PC. Receive interrupt is firing when in promiscuous mode. Turned off autoNeg and set both Nics to 100FullDuplex. Phy seems to be working, at least the receiver is. FPGA is new to me.
In SignalTap, I am seeing the correct pointer value to the RX buffer but no data getting to the mac. I triggered on eth_avalon_txdma:inst|TXen, which went high eth_avalon_txdma:eth_txdma_inst|tx_bd_read_r had a pulse eth_avalon_txdma:eth_txdma_inst|tx_bd_wait had several pulses eth_avalon_txdma:eth_txdma_inst|state went to 8. What else can I look at to see why it does not get any further? |
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RE: CortexM1 and Keil Stack
by jargule on Oct 18, 2011 |
jargule
Posts: 3 Joined: Oct 4, 2011 Last seen: Oct 21, 2011 |
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When my receiver interrupt occurs, the INT_SOURCE busy bit is set. Valid data is seen on
eth_ocm_0|eth_rxethmac:eth_rxethmac1|RxData. The docs say that the packet was discarded due to lack of buffers in when this is set. Valid pointer exists for the descriptor, and is marked as available. Why would it think there are no descriptors? Screenshot attached from signal tap.
signaltap.jpg (519 kb)
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